
Modern AI data centers face a critical bottleneck as copper interconnects reach their physical limits for high-speed data transmission. While copper remains the standard for rack-internal "scale-up" networks due to its low latency and native compatibility with semiconductor signals, its reach is restricted to approximately two meters. To overcome this, the industry is shifting toward Co-Packaged Optics (CPO), which integrates optical engines directly onto the ASIC package. This transition eliminates the need for power-hungry, latency-inducing Digital Signal Processors required by traditional pluggable transceivers. Although hyperscalers prioritize vendor diversity and repairability, the massive performance gains of larger GPU clusters—such as those enabled by NVIDIA’s NVL576 and future NVL1152 architectures—make CPO an inevitable evolution for scaling AI infrastructure beyond the physical constraints of copper.
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