The presentation focuses on high-performance interconnects for AI, addressing the increasing compute demands and the centrality of networking in AI infrastructure. It highlights the differences between AI workload characteristics and general-purpose computing, particularly the 100x larger bandwidth per GPU. The discussion covers topological, physical, and logical dimensions of interconnects, emphasizing the importance of flat, any-to-any topologies for generality and fault tolerance. It also addresses physical layer fundamentals like transmission medium characteristics, noting the limitations of copper and the need for advancements in optics. The presentation introduces a straw man architecture with a reliable packet transport layer and concludes by advocating for a bottoms-up approach to network design, driven by implementation rather than standards committees.
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