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C++20 on Xilinx FPGA with SYCL for Vitis - Ronan Keryell - CppCon 2021 | CppCon | Podwise

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06 Jan 2022

1h 8m

C++20 on Xilinx FPGA with SYCL for Vitis - Ronan Keryell - CppCon 2021

CppCon

CppCon - C++20 on Xilinx FPGA with SYCL for Vitis - Ronan Keryell - CppCon 2021

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